STM32文件归档

  目录

文件名称

简写 文件名称
RM Reference Manual
PM Programming Manual
AN Application Note

ARM调试接口协议说明

ARM Debug Interface Architecture Specification ADIv5.0 to ADIv5.2(ID080813)
ARM IHI 0031C 调试接口协议说明 <点击下载 ID080813.pdf>

About this book

This is the Architecture Specification for the ARM Debug Interface v5, ADIv5.0 to ADIv5.2 (ADIv5).

Intended audience

This specification is written for system designers and engineers who are specifying, designing or implementing a debug interface to the ADIv5 architecture specification. This includes system designers and engineers who are specifying, designing or implementing a System-on-Chip (SoC) that incorporates a debug interface that complies with the ADIv5 specification.
This specification is also intended for engineers who are working with a debug interface that conforms to the ADIv5 specification. This includes designers and engineers who are:

  • Specifying, designing or implementing hardware debuggers.
  • Specifying, designing or writing debug software.

These engineers have no control over the design decisions made in the ADIv5 interface implementation to which they are connecting, but must be able to identify the ADIv5 interface components present, and understand how they operate.
This specification provides an architectural description of an ADIv5 interface. It does not describe how to implement the interface.


ARM指令手册

Armv7-M Architecture Reference Manual(DDI0403E)

ARM V7-M指令手册 <点击下载 DDI0403E.pdf>

About this manual

This manual documents the Microcontroller profile of version 7 of the Arm® Architecture, the Armv7-Marchitecture profile. For short definitions of all the Armv7 profiles see About the Armv7 architecture, andarchitecture profiles on page A1-20.
The manual has the following parts:

  • Part A The application level programming model and memory model information along with theinstruction set as visible to the application programmer.

    This is the information required to program applications or to develop the toolchain components(compiler, linker, assembler and disassembler) excluding the debugger. For Armv7-M, this is almostentirely a subset of material common to the other two profiles. Instruction set details that differbetween profiles are clearly stated.

Note

All Armv7 profiles support a common procedure calling standard, the Arm Architecture ProcedureCalling Standard (AAPCS).

  • Part B The system level programming model and system level support instructions required for systemcorrectness. The system level supports the Armv7-M exception model. It also provides features forconfiguration and control of processor resources and management of memory access rights.

    This is the information in addition to Part A required for an operating system (OS) and/or systemsupport software. It includes details of register banking, the exception model, memory protection(management of access rights) and cache support.
    Part B is profile specific. Armv7-M introduces a new programmers’ model and as such has somefundamental differences at the system level from the other profiles. As Armv7-M is amemory-mapped architecture, the system memory map is documented here.

  • Part C The debug features to support the Armv7-M debug architecture and the programming interface tothe debug environment.

    This is the information required in addition to Parts A and B to write a debugger. Part C coversdetails of the different types of debug:

    • Halting debug and the related Debug state.
    • Exception-based monitor debug.
    • Non-invasive support for event generation and signalling of the events to an external agent.

    This part is profile specific and includes several debug features that are supported only in theArmv7-M architecture profile.

Appendices The appendices give information that relates to, but is not part of, the Armv7-M architecture profilespecification.

ARMv7-A and ARMv7-R Architecture Reference Manual(DDI0406C)

ARM V7-A/R指令手册 <点击下载 DDI0406C.pdf>

About this manual

This manual describes the A and R profiles of the ARM® architecture v7, ARMv7. It includes descriptions of:

  • The processor instruction sets:

    • the original ARM instruction set
    • the high code density Thumb® instruction set
    • the ThumbEE instruction set, that includes specific support for Just-In-Time (JIT) or Ahead-Of-Time(AOT) compilation.
  • The modes and states that determine how a processor operates, including the current execution privilege and security.

  • The exception model.

  • The memory model, that defines memory ordering and memory management:

    • the ARMv7-A architecture profile defines a Virtual Memory System Architecture (VMSA)
    • the ARMv7-R architecture profile defines a Protected Memory System Architecture (PMSA).
  • The programmers’ model, and its use of a coprocessor interface to access system control registers that control most processor and memory system features.

  • The optional Floating-point (VFP) Extension, that provides high-performance floating-point instructions that support:

    • single-precision and double-precision operations
    • conversions between double-precision, single-precision, and half-precision floating-point values.
  • The optional Advanced SIMD Extension, that provides high-performance integer and single-precision floating-point vector operations.

  • The optional Security Extensions, that facilitate the development of secure applications.

  • The optional Virtualization Extensions, that support the virtualization of Non-secure operation.

  • The Debug architecture, that provides software access to debug features in the processor


STM32F10xxx参考手册

STM32 Reference Manual (RM0008)
STM32F10xxx中文参考手册 <点击下载 RM0008.pdf>

本参考手册针对应用开发,提供关于如何使用STM32F101xx、STM32F102xx、STM32F103和STM32F105xx/STM32F107xx 微控制器的存储器和外设的详细信息。在本参考手册中STM32F101xx 、 STM32F102xx 、 STM32F103 和 STM32F105xx/STM32F107xx 被统称为STM32F10xxx。
STM32F10xxx系列拥有不同的存储器容量、封装和外设配置。
关于订货编号、电气和物理性能参数,请参考小容量、中容量和大容量的STM32F101xx和STM32F103xx的数据手册,小容量和中容量的STM32F102xx数据手册和STM32F105xx/STM32F107xx互联型产品的数据手册。
STM32F10xxx闪存编程手册参照2009年12月 RM0008 Reference Manual 英文第10版关于芯片内部闪存的编程,擦除和保护操作,请参考 。
关于ARM Cortex™-M3内核的具体信息,请参考Cortex™-M3技术参考手册。


STM32F10xxx闪存编程手册

STM32F10xxx Flash memory microcontrollers(PM0075)

STM32F10xxx闪存编程手册 <点击下载 PM0075.pdf>

Introduction

This programming manual describes how to program the Flash memory of STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and STM32F107xx microcontrollers. For convenience, these will be referred to as STM32F10xxx in the rest of this document unless otherwise specified.
The STM32F10xxx embedded Flash memory can be programmed using in-circuit programming or in-application programming.
The in-circuit programming (ICP) method is used to update the entire contents of the Flash memory, using the JTAG, SWD protocol or the boot loader to load the user application into the microcontroller. ICP offers quick and efficient design iterations and eliminates unnecessary package handling or socketing of devices.
In contrast to the ICP method, in-application programming (IAP) can use any communication interface supported by the microcontroller (I/Os, USB, CAN, UART, I2C, SPI, etc.) to download programming data into memory. IAP allows the user to re-program the Flash memory while the application is running. Nevertheless, part of the application has to have been previously programmed in the Flash memory using ICP.
The Flash interface implements instruction access and data access based on the AHB protocol. It implements a prefetch buffer that speeds up CPU code execution. It also implements the logic necessary to carry out Flash memory operations (Program/Erase).
Program/Erase operations can be performed over the whole product voltage range.
Read/Write protections and option bytes are also implemented.
Table 1 lists the microcontrollers and evaluation tool concerned by this programming manual.

Table 1. Applicable products

Type Applicable products
Microcontrollers STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and STM32F107xx microcontrollers
Evaluation tool STM3210C-EVAL evaluation board

STM32F10xxx XL-density Flash programming(PM0068)

STM32F10xxx XL-density闪存编程手册 <点击下载 PM0068.pdf>


STM32单片机系统内存启动方式

STM32F10xxx 自举程序应用笔记
STM32单片机系统内存启动方式 <点击下载 AN2606.pdf>

自举程序存储在STM32器件的内部自举ROM(系统存储器)中,由ST在生产期间进行编程。其主要任务是通过一种可用的串行外设(如USART、CAN、USB、I2C)将应用程序下载到内部Flash中。每种串行接口都定义了相应的通信协议,其中包含兼容的命令集和序列。本文档适用于表 1中列出的产品,这些产品在文档中统称为STM32。该文档描述了使用STM32器件的自举程序时支持的外设以及需要考虑的硬件要求

STM32单片机自举程序中使用的 USART 协议 <点击下载 AN3155.pdf>

本应用笔记将介绍 USART 协议在 STM32 微控制器自举程序中的应用,还将详细介绍支持的每个命令。要详细了解器件自举程序的 USART 硬件资源和要求,请参见“STM32 系统存储器自举模式”(应用笔记 AN2606)。


STM32单片机软件开发说明

STM32F10xxx/20xxx/21xxx/L1xxxx Cortex®-M3 programming manual
STM32单片机软件开发说明 <PM0056.pdf>

Introduction

This programming manual provides information for application and system-level software developers. It gives a full description of the STM32F10xxx/20xxx/21xxx/L1xxxx Cortex®-M3 processor programming model, instruction set and core peripherals.
The STM32F10xxx/20xxx/21xxx/L1xxxx Cortex®-M3 processor is a high performance 32-bit processor designed for the microcontroller market. It offers significant benefits to developers, including:

  • Outstanding processing performance combined with a fast interrupt handling
  • Enhanced system debug with extensive breakpoint and trace capabilities
  • Efficient processor core, system and memories
  • Ultra-low-power consumption with integrated sleep modes
  • Platform security

STM32F10x 使用FLASH模拟EEPROM

EEPROM emulation in STM32F10x microcontrollers
STM32F10x 使用FLASH模拟EEPROM <点击下载 AN2594.pdf>

Introduction

Many applications require EEPROM (electrically erasable programmable read-only memory) for non-volatile data storage. For low-cost purposes, the STM32F10x devices do not use EEPROM. Instead, they implement EEPROM emulation using the embedded Flash memory.
This application note explains the differences between external EEPROM and embedded Flash memory, and it describes a software method for emulating EEPROM using the on-chip Flash memory of the STM32F10x devices.
This document also focuses on some embedded aspects in emulated EEPROM data storage, that the reader is assumed to know.

Glossary

Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F10x and STM32F103xx microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes.
High-density devices are STM32F10x and STM32F103xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.


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